The Plasma technology makes it possible to achieve flat color panel of large size (out of the CRT limitations) and with very limited depth without any viewing angle constraints. Referring to the last generation of European TV, a lot of work has been made to improve its picture quality. Consequently, a new technology like the Plasma one has to provide a picture quality as good or even better than standard TV technology. In order to display a video picture with a quality similar to the CRT, at least 8-bit video data is needed. In fact, more than 8 bits should be preferably be used to have a correct rendition of the low video levels because of the gammatization process that aims at reproducing the non-linear CRT behavior on a linear panel like plasma.
A Plasma Display Panel (PDP) utilizes a matrix array of discharge cells that could only be “ON” or “OFF”. Also unlike a CRT or LCD in which gray levels are expressed by analog control of the light emission, a PDP controls the gray level by modulating the number of small light pulses per frame. This time-modulation will be integrated by the observer's eye over a period corresponding to the eye time response.
Today, a lot of methods exist for reproducing various video levels using the modulation of the light pulses per frame (PWM—Pulse Width Modulation). In some cases it is not possible to reproduce enough video levels due to timing issues, use of a specific solution against false contour effect, etc. In these cases, some dithering technique should be used to artificially render all required levels. The visibility of the dithering noise will be directly linked to the way the basic levels have been chosen.
Dithering per se is a well-known technique used to reduce the effects of quantisation noise due to a reduced number of displayed resolution bits. With dithering, some artificial levels are added in-between the existing video levels corresponding to the reduced number of displayed resolution bits. This improves the gray scale portrayal, but on the other hand adds high frequency, low amplitude dithering noise which is perceptible to the human viewer only at a small viewing distance.
An optimization of the dithering concept is able to strongly reduce its visibility as disclosed in the WO-A-01/71702.
Various reasons can lead to a lack of video levels in the gray level rendition on a plasma screen (or similar display based on PWM system-like (Pulse Width Modulation) light generation.
Some of the main reasons for a lack of level rendition are listed below:                In case of simple binary coding (each sub-field corresponds to a bit) 8 sub-fields are required for an acceptable gray scale rendition. Nevertheless, for some single scan panels, the addressing speed is not fast enough to render 8 sub-fields in a given timeframe (20 ms in 50 Hz video sources (PAL, SECAM), 16.6 ms in 60 Hz video sources (NTSC), 13.3 ms in 75 Hz video sources, . . . ).        For good response fidelity, specific sub-field organizations with a specific sub-field weight sequence are needed. For instance, a sub-field sequence growing slower than the Fibonacci sequence (1-1-2-3-5-8-13-21-34-55-89-144-233 . . . ) increases the response fidelity of the panel. In that case at least 12 sub-fields are required to achieve more than 255 different levels corresponding to 8-bit video. Even in case of a dual-scan panel, the addressing time is mainly too slow to have both a good coding and enough sustain time to provide a good contrast and a good peak-white enhancement.        In order to completely suppress the PWM related artifacts known under the name “false contour effect”, a new coding concept has been developed called “incremental code”. Such a coding system does no more allow to have any sub-field switched OFF between two sub-fields switched ON. In that case, the number of video levels which can be rendered is equal to the number of sub-fields. Since it is not possible to dispose of 255 different sub-fields on a plasma display (around 122 ms needed for addressing only), it won't be possible via such a method to dispose of enough video levels.        
In order to simplify the exposition, the last case will be used as an example for the further explanation. Obviously, the invention described in this document is however not limited to this concept.
The plasma cell has only two different states: a plasma cell can only be ON or OFF. Thus video levels are rendered by using a temporal modulation. The most efficient addressing scheme should be to address N times if the number of video levels to be created is equal to N. In case of an 8 bit video value, each cell should be addressable 256 times in a video frame! This however, is not technically possible since each addressing operation requires a lot of time (around 2 μs per line, i.e. 480 μs for the addressing of all lines in dual scan mode and 256*480 μs=122 ms for the maximum value of 256 operations, which is much more than the 20 ms available time in case of the 50 Hz display mode).
Then, there are two possibilities to render the information. The first one is to use a minimum of 8 SF (in case of an 8-bit video level representation) and the combination of these 8 SF is able to generate the 256 levels. Such a mode is illustrated in FIG. 1.
Each sub-field is divided into three parts: an addressing part, a sustain part and an erase part. The addressing period is used to address line per line the plasma cells by applying a writing voltage to those cells that shall be activated for light generation and is typical for PDPs. The sustain period is used as a period for lighting of written plasma cells by applying sustain pulses with a typical sustain voltage to all cells. Finally, the erase period is used for erasing the cell charges, thereby neutralizing the cells.
FIG. 2 presents the standard method used to generate all 256 video levels based on the 8 bit code from FIG. 1.
According to FIG. 3 the eye of the observer will integrate, over the duration of the image period, the various combinations of luminous emissions and by this recreate the various shades in the gray levels. In case of no motion (left side of FIG. 3), the integration axis will be perpendicular to the panel in the time direction. The observer will integrate information coming from the same pixel and will not detect any disturbances.
If the object is moving (right side of FIG. 3), the observer will follow this object from frame t to t+1. On a CRT, because the emission time is very short the eye will follow correctly the object even with a large movement. On a PDP, the emission time extends over the whole image period. With an object movement of 3 pixels per frame, the eye will integrate sub-fields coming from 3 different pixels. Unfortunately, if among these 3 pixels there is a transition, this integration can lead to the false contour as shown at the bottom of FIG. 3 on the right.
The second encoding possibility already mentioned before is to render only a limited number of levels but to choose these levels in order to never introduce any temporal disturbance. This code will be called “incremental code” because for any level B>A one will have codeB=codeA+C where C is a positive value. This coding obviously limits the number of video levels which can be generated to the number of addressing periods. However, with such a code there will never be one sub-field OFF between two consecutive sub-fields ON. Some optimized dithering or error diffusion techniques can help to compensate this lack of accuracy.
The main advantage of such a coding method is the suppression of any false contour effect since there are no more any discontinuities between two similar levels (e.g. 127/128) as it was the case with standard 8 bit coding. For that reason this mode is sometimes called NFC mode for No False Contour. On the other hand, such a mode requires dithering to dispose of enough video levels, which can introduce some disturbing noise.
FIG. 4 illustrates the generation of 256 levels with an incremental code based on 16 sub-fields and 4 bit dithering (16×24=256). For this a spatio-temporal uncorrelation of the 16 available basic levels is used. This example based on 16 sub-fields will be used in the following in order to simplify the exposition.
FIG. 5 presents the case of a transition 127/128 rendered via this mode in case of movement. It shows that moving transitions between similar levels are no more a source of false contouring but lead to smooth transitions. FIG. 4 illustrates the incremental addressing mode without addressing period. A global addressing operation is performed at the beginning of a frame period, called global priming. This is followed by a selective erase operation in which the charge of only those cells is quenched that shall not produce light. All the other cells remain charged for the following sustain period. The selective erase operation is part of each sub-field. At the end of the frame period a global erase operation neutralizes all cells. FIG. 6 illustrates a possibility to implement the incremental coding scheme with 4 bit dithering.
A further important aspect is the implementation of a gamma correction. The CRT displays do not have a linear response to the beam intensity but rather a quadratic response. For that reason, the pictures sent to the display are pre-corrected in the studio or mostly already in the video camera itself so that the picture seen by the human eye respects the filmed picture. FIG. 7 illustrates this principle.
In the case of Plasma displays which have a linear response characteristic, the pre-correction made at the source level will degrade the observed picture which becomes unnatural as illustrated on FIG. 8. In order to suppress this problem, an artificial gamma operation made in a specific video-processing unit of the plasma display device will invert the pre-correction made at the source level. Normally the gamma correction is made in the plasma display unit directly before the encoding to sub-field level. This gamma operation leads to a destruction of low video levels if the output video data is limited to 8 bit resolution as illustrated on FIG. 9.
In the case of the incremental code, there is an opportunity to avoid such an effect. In fact, it is possible to implement the gamma function in the sub-field weights. It shall be assumed to dispose of 16 sub-fields following a gamma function (γ=1.82) from 0 to 255 with a dithering step of 16 (4 bit). In that case, for each of the 16 possible video values Vn, the value displayed should respect the following progression:
                              V          0                =                ⁢                              255            ×                                          (                                                      0                    ×                    16                                    256                                )                            1.82                                =          0                                                  V          1                =                ⁢                              255            ×                                          (                                                      1                    ×                    16                                    256                                )                            1.82                                =          2                                                  V          2                =                ⁢                              255            ×                                          (                                                      2                    ×                    16                                    256                                )                            1.82                                =          6                                                  V          3                =                ⁢                              255            ×                                          (                                                      3                    ×                    16                                    256                                )                            1.82                                =          12                                                  V          4                =                ⁢                              255            ×                                          (                                                      4                    ×                    16                                    256                                )                            1.82                                =          20                                                  V          5                =                ⁢                              255            ×                                          (                                                      5                    ×                    16                                    256                                )                            1.82                                =          30                                                  V          6                =                ⁢                              255            ×                                          (                                                      6                    ×                    16                                    256                                )                            1.82                                =          42                                                  V          7                =                ⁢                              255            ×                                          (                                                      7                    ×                    16                                    256                                )                            1.82                                =          56                                                  V          8                =                ⁢                              255            ×                                          (                                                      8                    ×                    16                                    256                                )                            1.82                                =          72                                                  V          9                =                ⁢                              255            ×                                          (                                                      9                    ×                    16                                    256                                )                            1.82                                =          89                                                  V          10                =                ⁢                              255            ×                                          (                                                      10                    ×                    16                                    256                                )                            1.82                                =          108                                                  V          11                =                ⁢                              255            ×                                          (                                                      11                    ×                    16                                    256                                )                            1.82                                =          129                                                  V          12                =                ⁢                              255            ×                                          (                                                      12                    ×                    16                                    256                                )                            1.82                                =          151                                                  V          13                =                ⁢                              255            ×                                          (                                                      13                    ×                    16                                    256                                )                            1.82                                =          175                                                  V          14                =                ⁢                              255            ×                                          (                                                      14                    ×                    16                                    256                                )                            1.82                                =          200                                                  V          15                =                ⁢                              255            ×                                          (                                                      15                    ×                    16                                    256                                )                            1.82                                =          227                                                  V          16                =                ⁢                              255            ×                                          (                                                      16                    ×                    16                                    256                                )                            1.82                                =          255                    
Thus, in the case of an incremental code, for each value B>A, codeB=codeA+C where C is positive. In that case the weights are easy to compute on the basis of the following formula: Vn+1=Vn+SFn+1 for n>0. One obtains the following sub-field weights SFn=Vn−Vn−1:    SF1=2−0=2    SF2=6−2=4    SF3=12−6=6    SF4=20−12=8    SF5=30−20=10    SF6=42−30=12    SF7=56−42=14    SF8=72−56=16    SF9=89−72=17    SF10=108−89=19    SF11=129−108=21    SF12=151−129=22    SF13=175−151=24    SF14=200−175=25    SF15=227−200=27    SF16=255−227=28
The accumulation of these weights follows a quadratic function (gamma=1.82) from 0 (no SF ON) up to 255 (all SF ON). FIG. 10 represents this encoding method. It shows that an optimized computation of the weights for an incremental code enables to take into account the gamma progression without the implementation of a specific gamma operation at video level. Obviously, in the present example, only the use of 4-bit dithering enables the generation of the 256 different perceived video levels.
If nothing specific is implemented, each of the 16 sub-fields will be used to render a group of 16 video levels. FIG. 11 illustrates this principle. It represents how the various video levels will be rendered in the example of an incremental code. All levels between 0 and 15 will be rendered while applying a dithering based on the sub-field SF0 (0) and SF1 (2). All the levels between 224 and 240 will be rendered while applying a dithering based on the sub-
            SF      14        ⁡          (                                    ∑                          i              =              0                                      i              =              14                                ⁢                      SF            i                          =        200            )        ⁢          ⁢  and  ⁢          ⁢                    SF        15            ⁡              (                                            ∑                              i                =                0                                            i                =                15                                      ⁢                          SF              i                                =          227                )              .  
In this presentation the black level is defined as SF0 (weight=0). Of course, there is no extra sub-field SF0 in the sub-field organization. The black level is simply be generated by not activating or deactivating all other sub-fields SF1 to SF16. An example: The input video level 12 should have the amplitude 1 after gammatization (255·(12/255)1.82=1) and this could be rendered with the dithering shown in FIG. 12. Half of the pixels in a homogenous block will not be activated for light generation and half will be activated for light generation only with sub-field SF1-having the weight “2”. From frame to frame the dithering pattern is toggled as shown in FIG. 12. FIG. 12 represents a possible dithering used to render the video level 12 taking into account the gamma of 1.82 used to compute the weights.
On the other hand, if no specific adaptation is applied, exactly the same dithering will be used in order to render the video level 231 (213.5 after gamma) as shown in FIG. 13. It represents a possible dithering used to render the video level 231 taking into account the gamma of 1.82 used to compute the weights (255·(231/255)1.82=213.5).
FIG. 12 and FIG. 13 have shown that the same kind of dithering (4-bit) has been used both for the low-level and the high level video range. Each of the 16 possible video levels are equally distributed among the 256 video levels and the same kind of dithering is applied in-between to render the other levels. On the other hand, this does not fit with the human perception of luminance. Indeed the eye is much more sensitive to noise in the low level than in the luminous areas.